MRAM Developer Day

August 5, 2019
Santa Clara, California


Chairperson’s Message

Barry Hoberman

Barry Hoberman

Independent Consultant

After nearly two decades of development, MRAM has finally reached the threshold of production in relevant volumes and densities. The key device technology, already proven successful and ubiquitous in hard disk drives for over a decade, has evolved through several generations of operating principle and manufacturing techniques. Market visibility is high, driven by key semiconductor wafer foundries' recent announcements of impending market introductions and technology roadmaps for embedded system-on-chip applications, along with the first shipments of 256 megabit and higher standalone memories.

As MRAM enters viable planning windows for system and SOC developers, the intrinsic benefits of higher endurance, higher speed, lower write energy, fully random access, and scalability to advanced CMOS nodes will start to expand the served application footprint. For many years developer conversations have centered on putting MRAM to use in storage systems, where it naturally solves a number of 'protecting data-on-the-fly' problems and can speed I/O rates. More recently, IOT systems needing low write energy (for small battery and scavenged energy profiles) and high endurance (for challenges like data logging for 10 years) reflect large opportunities. Emerging artificial intelligence systems and their 'learning algorithms' hold promise for a natural fit for MRAM.

This inaugural 2018 MRAM Developers Day is intended to provide a forum for thought leaders at the system, chip, and supplier level to share points of view, keep appraised of the latest MRAM news, and connect with industry segment leaders.